Berkeley Lab’s One-Nanometer Transistor Could Keep Electronics On Exponential Growth

Decades ago Intel Co-Founder Gordon Moore observed that the density, degree of miniaturization, and ultimately the performance of electronic components, was doubling every two years.

This exponential increase of electronics performance, dubbed Moore’s Law, has been followed so far and resulted in a spectacular growth of electronics, communications and computing over the last few decades.

However, indications that Moore’s Law could be slowing down as shrinking electronics approaches fundamental size limits have thrown the electronics and computing industries into panic. How could Apple, for example, keep packing more and more features into new iPhones if Moore’s Law stops?

Enter Lawrence Berkeley National Laboratory (aka Berkeley Lab). On October 6 Berkeley Lab announced that engineers in a Berkeley-led research team have broken major barrier in transistor size by creating a gate only one nanometer (one billionth of a meter) long, which represents a five times improvement over the five nanometers that were thought to represent a theoretical limit.

The results are reported in Science with the title “MoS2 transistors with 1-nanometer gate lengths.”

“[Engineers] knew that the laws of physics had set a 5-nanometer threshold on the size of transistor gates among conventional semiconductors, about one-quarter the size of high-end 20-nanometer-gate transistors now on the market,” notes the Berkeley Lab press release.

Some laws are made to be broken, or at least challenged.

The development could be key to keeping Moore’s Law alive, enabling the increased performance of our laptops, mobile phones, televisions, and other electronics.

“We made the smallest transistor reported to date,” says research team leader Ali Javey. “The gate length is considered a defining dimension of the transistor. We demonstrated a 1-nanometer-gate transistor, showing that with the choice of proper materials, there is a lot more room to shrink our electronics.”

“Here, we demonstrate 1D gated, 2D semiconductor field-effect transistors (1D2D-FETs) with a single-walled carbon nanotube (SWCNT) gate, a MoS2 channel, and physical gate lengths of ~1 nm,” reads the Science paper.

New Materials With Immense Potential For Future Electronics

Schematic of a transistor with a molybdenum disulfide channel and 1-nanometer carbon nanotube gate. (Credit: Sujay Desai/UC Berkeley)
Schematic of a transistor with a molybdenum disulfide channel and 1-nanometer carbon nanotube gate.

The researchers achieved this breakthrough by using molybdenum disulfide (MoS2), a material with “immense potential” for applications in LEDs, lasers, nanoscale transistors, solar cells, and more.

Sujay Desai, a graduate student in Javey’s lab, explains that the semiconductor industry has long assumed that any gate below 5 nanometers wouldn’t work, so anything below that was not even considered. “This research shows that sub-5-nanometer gates should not be discounted,” says Desai. “Industry has been squeezing every last bit of capability out of silicon. By changing the material from silicon to MoS2, we can make a transistor with a gate that is just 1 nanometer in length, and operate it like a switch.”

Besides the MoS2 substrate, the engineers used a single-walled carbon nanotube to construct the one-nanometer gate, and verified that the MoS2 transistor with the carbon-nanotube gate effectively controlled the flow of electrons.

Carbon nanotubes offer many promising features for future electronics. For example, a nanotube’s ultra-small dimension permits rapidly varying the current that flows through. In September, Hacked reported that University of Wisconsin–Madison materials engineers created carbon nanotube transistors that, for the first time, outperformed state-of-the-art silicon transistors, a breakthrough that points the way to future high-performance nanotube electronics. Earlier this year, Nantero announced the use of carbon nanotubes for storage that can be fabricated on DRAM, flash, and system production lines.

“This work demonstrated the shortest transistor ever,” concludes Javey. “However, it’s a proof of concept. We have not yet packed these transistors onto a chip, and we haven’t done this billions of times over. We also have not developed self-aligned fabrication schemes for reducing parasitic resistances in the device. But this work is important to show that we are no longer limited to a 5-nanometer gate for our transistors.”

Moore’s Law can continue a while longer by proper engineering of the semiconductor material and device architecture.”

Images from iStock and Sujay Desai/UC Berkeley.

Giulio Prisco is a freelance writer specialized in science, technology, business and future studies.